Update constraints to JLCPCB capabilities & update fonts

JLCPCB-4L-3313.kicad_pcb

@@ -100,9 +100,9 @@
 				(type "Bottom Silk Screen")
 			)
 			(copper_finish "HAL SnPb")
-			(dielectric_constraints no)
+			(dielectric_constraints yes)
 		)
-		(pad_to_mask_clearance 0.038)
+		(pad_to_mask_clearance 0)
 		(solder_mask_min_width 0.13)
 		(allow_soldermask_bridges_in_footprints yes)
 		(pcbplotparams

JLCPCB-4L-3313.kicad_pro

@@ -118,18 +118,18 @@
         "max_error": 0.005,
         "min_clearance": 0.09,
         "min_connection": 0.09,
-        "min_copper_edge_clearance": 0.3,
+        "min_copper_edge_clearance": 0.2,
-        "min_hole_clearance": 0.25,
+        "min_hole_clearance": 0.2,
-        "min_hole_to_hole": 0.25,
+        "min_hole_to_hole": 0.2,
         "min_microvia_diameter": 0.2,
         "min_microvia_drill": 0.1,
         "min_resolved_spokes": 2,
         "min_silk_clearance": 0.0,
         "min_text_height": 0.8,
         "min_text_thickness": 0.08,
-        "min_through_hole_diameter": 0.2,
+        "min_through_hole_diameter": 0.15,
         "min_track_width": 0.09,
-        "min_via_annular_width": 0.13,
+        "min_via_annular_width": 0.15,
         "min_via_diameter": 0.35,
         "solder_mask_clearance": 0.0,
         "solder_mask_min_width": 0.0,
@@ -182,6 +182,7 @@
       "track_widths": [
         0.0,
         0.09,
+        0.12,
         0.15,
         0.3,
         0.5,
@@ -227,7 +228,7 @@
           "drill": 0.2
         },
         {
-          "diameter": 0.6,
+          "diameter": 0.5,
           "drill": 0.3
         },
         {
@@ -452,7 +453,7 @@
       "no_connect_dangling": "warning",
       "pin_not_connected": "error",
       "pin_not_driven": "error",
-      "pin_to_pin": "warning",
+      "pin_to_pin": "error",
       "power_pin_not_driven": "error",
       "similar_labels": "warning",
       "simulation_model_issue": "ignore",
@@ -474,7 +475,7 @@
     "classes": [
       {
         "bus_width": 12,
-        "clearance": 0.2,
+        "clearance": 0.15,
         "diff_pair_gap": 0.2,
         "diff_pair_via_gap": 0.25,
         "diff_pair_width": 0.15,
@@ -485,7 +486,7 @@
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
         "track_width": 0.15,
-        "via_diameter": 0.6,
+        "via_diameter": 0.5,
         "via_drill": 0.3,
         "wire_width": 6
       },
@@ -501,9 +502,26 @@
         "name": "IC Power",
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
-        "track_width": 0.5,
+        "track_width": 0.3,
-        "via_diameter": 0.8,
+        "via_diameter": 0.5,
-        "via_drill": 0.4,
+        "via_drill": 0.3,
+        "wire_width": 6
+      },
+      {
+        "bus_width": 12,
+        "clearance": 0.15,
+        "diff_pair_gap": 0.1016,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.1795,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "USB 90Ω",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.15,
+        "via_diameter": 0.35,
+        "via_drill": 0.2,
         "wire_width": 6
       }
     ],
@@ -512,7 +530,24 @@
     },
     "net_colors": null,
     "netclass_assignments": null,
-    "netclass_patterns": []
+    "netclass_patterns": [
+      {
+        "netclass": "IC Power",
+        "pattern": "+5V"
+      },
+      {
+        "netclass": "IC Power",
+        "pattern": "+3.3V"
+      },
+      {
+        "netclass": "IC Power",
+        "pattern": "3V3"
+      },
+      {
+        "netclass": "IC Power",
+        "pattern": "GND"
+      }
+    ]
   },
   "pcbnew": {
     "last_paths": {
@@ -530,6 +565,7 @@
   },
   "schematic": {
     "annotate_start_num": 0,
+    "bom_export_filename": "",
     "bom_fmt_presets": [],
     "bom_fmt_settings": {
       "field_delimiter": ",",
@@ -592,7 +628,7 @@
       "dashed_lines_dash_length_ratio": 12.0,
       "dashed_lines_gap_length_ratio": 3.0,
       "default_line_thickness": 6.0,
-      "default_text_size": 50.0,
+      "default_text_size": 40.0,
       "field_names": [],
       "intersheets_ref_own_page": false,
       "intersheets_ref_prefix": "",

JLCPCB-4L-3313.kicad_sch

@@ -10,4 +10,4 @@
 			(page "1")
 		)
 	)
-)
+)

fp-info-cache

@@ -1 +0,0 @@
-0